Peter, I believe that gnetlist takes in a hierarchical series of schematics and flattens the schematics into a flat netlist that may then be exported into a number of flat formats. In other words the net has been flattened before reaching the backend. Hierarchical information is retained in reference designators and in net names.
It would be a non-simple task to reconvert the hierarchical information in the reference designators and nets back into a hierarchical format. Steve Meier On Wed, 2008-11-19 at 10:32 +0000, Peter Clifton wrote: > On Wed, 2008-11-19 at 10:23 +0000, r wrote: > > Hi, > > > > I hit exactly same issues last time I tried to use gschem/gnetlist. > > The flow simply doesn't work with hierarchical designs (and yes, there > > is no notion of a "design library" in geda). > > That simply is not true. The netlister _does_ work with hierarchical > designs, but typically, our back-ends target a flat output, such as for > PCB. There are "symbol" and "source" libraries (symbols and underlying > schematics). > > Granted, we probably could do with adding some polish, but depending on > what you're wanting as your final output, you can do hierarchical > designs. > _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user