2009/1/5 DJ Delorie <d...@delorie.com>: > If a standard is not documented with freely available documentation, > it's unlikely any of us will even be interested in it.
Icarus verilog outputs EDIF for fpga targets... Of course I would be able to RTFS to figure out the subset it generates, but in such cases I prefer to implement the standard, not an interpretation of it. _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user