John Griessen wrote: > Eric Brombaugh wrote: >> John Griessen wrote: >>> How about the code intensive hardware system developers that start >>> a project with FPGA then migrate it to ASIC? What language do they use -- >>> c++? >> Typically they'll use a HDL like Verilog or VHDL. > > OK for the HW. But they are developing code in parallel. > What do those types use for code languages is what I'd like to know... > I've been out of chip design work long enough to not know anymore.
Hmm - not quite sure what you're asking here. If you are referring to HW/SW co-development for situations like SoCs which have embedded processors, then yes - the folks on the SW side will usually be developing in Assy/C/C++ and using simulators/emulators to test code prior to getting silicon. Eric _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user