Michael B Allen wrote:
> Hi,
> 
> I can't get a simulation of this circuit to run:
> 
>   http://207.192.69.113/~miallen/JFET_Preamp_1.pdf
> 
> I copied this from about half-way down this page:
> 
>   http://www.ciphersbyritter.com/RADELECT/PREJFET/JFETPRE.HTM
> 

Ok, I am not using GNU-cap or gEDA, but:


> With GNU-Cap the Q1 drain values are pinned at 4V. With ngspice, the
> Q1 drain, Q2 collector and output all look the same:
> 
>   http://207.192.69.113/~miallen/JFET_Preamp_1.png
> 

That's wrong. Q1 drain should be inverted versus the input and it is 
(but severely clipping). All others should not be inverted yet they are. 
If something like this happens the next thing would be to look at all 
the DC levels. Probably some are out of whack, this is IMHO not a very 
good feedback method.

[...]

-- 
Regards, Joerg

http://www.analogconsultants.com/



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