On Sun, 16 Aug 2009 17:38:17 +0200, Christoph Lechner wrote: > I'm just doing the artwork for a SMPS power supply and I'm wondering if > it is possible to make a polygon and the pads of some component merge > completely. So not the usual way with a ring around every pad where you > see the tracks hidden under the poly
total connection is one of the thermal styles. You can cycle through the styles of a via with shift-click. http://geda.seul.org/wiki/geda:pcb_tips#what_is_the_easiest_way_to_create_a_thermal_via > BTW: How do I set the clearline flag for existing tracks ? > SetFlag(Selected, clearline) does not work. Perhaps, you mean the join flag. http://geda.seul.org/wiki/geda:pcb_tips#the_polygons_are_shorting_my_tracks_what_can_i_do_about_it ---<(kaimartin)>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user