Folks - I need a hint on settings. Here is the scenario: 1) I have a heirarchical schematic developed - level one linking seven sheets on level two. Each page on level two has a reference designator of "SAn" (ie: SA1, SA2, ...etc)
2) I have a PWB developed for the design. Currently each part on the PWB has a silk screen designator with a prefix of "SAn" - ie: SA1/R14. Many of these are way to long for the available space. This pwb is not in a completed state. 3) I am making a major revision to four pages on the design and I would like to remove the "SAn" prefixes. 4) I have verified that there are NO duplicate reference designators and no duplicate net names. 5) I went into both my local and system gnetlistrc files and changed hierarchy-uref-mangle hierarchy-netname-mangle and hierarchy-netattrib-mangle to "disabled" (uncommented / commented) 6) When I execute a gnetlist I get the correct, non-prefixed part numbers. 7) I manually edited A COPY of my pwb to remove the prefixes so that the process of gsch2pcb SHOULD see R112 instead of SA4/R112, and (I thought) everything should play nice.. 8) What happened: All components got ripped off the board and the new parts file was populated with the parts with prefix-appended part numbers (SA4/R112). My Question: Is there a setting I am missing to NOT use the prepended sheet refdes's in the gsch2pcb process? My fallback is to ignore the designators untill I gloss the board, but it would be convenient now. Any ideas? Thanks, Folks!! Cheers.... T. _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user