John Doty: These refer to the device, not the pattern of copper on the board. The pattern of copper corresponding to a given device footprint should be chosen in the layout process, because it depends (like other layout parameters) on the manufacturing processes.
I am still confused by your continual assertion that the copper pattern should be completely separate from the physical part. As pointed out above, a DIP-16 is a through-hole device in any process, the pins are always 0.100 inches apart, the part number defines if it is a typical 300 mill spacing, or a wide 600 mill. What ever process you use to attach the chip to a circuit board, those things never change for that physical part number. The closest I can guess to something that would be 'process dependent' would be the size of the copper pads, and possibly the exclusion zone around them. I could see having one version for hand soldered work, with 40 mill pads and only enough room to run one signal line between them; and a professional fab shop version with 15 mill pads, 10 mill or smaller traces and and spaces and room for 4 or more signals between pins. If there was a parameter that could be set by gattrib for each part, or gsch2pcb for all to pick from fat or skinny pads, I could see some use in that. But as far as I know, you can also do all of that in pcb, so there is no range of process variation that still uses a 16 pin dip that could not be edited in pcb. So why must we divorce the copper pattern from the component? How divergent a process are you holding out for that would still be laid out in pcb? Mike
_______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user