On Fri, 2010-08-06 at 17:42 -0700, Andrew Poelstra wrote: > Layer groups as I proposed > separate the board into different workspaces to keep things organized. >
I understand your goal, and support it. But I still have problems to imagine how "workspaces" will work for layout process. At the end all traces and elements must fit on the board, and there space is the limiting factor. Of course I understand more simple concepts, like better support for selections (selecting all elements from one schematic sheet, all elements from a subcircuit like an amplifier or DC-DC-converter,...) or crossprobing. But your desire seems to be beyond that. So am example with a picture may be fine. Best regards, Stefan Salewski _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user