> Just boot the FPGA from the processor. That's what I always do. I did that on my last FPGA design. Wanted an excuse to play with the 3AN :-)
> When I have a processor, that is. The only overhead is the four > GPIO pins attached to the FPGA JTAG, and those can be put to good > use after booting as well. I used the SPI pins, just streamed the bitstream at full speed. The RX board uses jtag, so I have to convert the bitstream to XSVF and play it into the chip, but I don't have to include that code (or bitstream) in any normal apps. _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user