Hi all, First I'd like to say thanks to all the gEDA devs for creating such a great EDA package. After the initial learning curve and time spent learning all the little quirks and file formats, I much prefer gEDA over the commercial packages I've had to use.
I've just started panelising some designs in PCB and while I've managed to create panels for manufacture, my process seems like a bit of a kludge. My current workflow goes like this: -Create individual boards in PCB (say board1.pcb and board2.pcb) -Run python script to generate the panel .pcb file (create pcb file of proper size, v-cuts, internal routes for punchout, mouse-bites, measurements, etc) -Run python script to generate pcb action script (Commands load board1/2.pcb into past buffer and paste in tiled pattern) -Load panel .pcb file in PCB -Execute command file in PCB -Place fiducials, thieving patterns, text, whatever in panel .pcb file -Export to Gerber I'd be interested to know if there's a better way to do this. I'm also a bit confused about how the panel outline and mechanical layers should work in this situation: I initially created the panel .pcb file with the exact dimensions of the panel I wished to create. When I sent out the Gerbers for quotes I had both fab houses come back to me saying they couldn't determine the panel's dimensions, in the end I had to create the panel .pcb file with arbitrarily larger dimensions and draw a panel sized rectangle so that they could determine the panel's size. Is this how it's normally done, it seems to defeat the whole purpose of specifying the dimensions in the .pcb file? I've never run into this problem when when manufacturing individual boards from PCB's gerber exports. My current layer stack is : Layer(1 "component") Layer(2 "solder") Layer(3 "GND") Layer(4 "power") Layer(5 "signal1") Layer(6 "signal2") Layer(7 "signal3") Layer(8 "signal4") Layer(9 "route") - internal routing so that boards can be punched out in strips Layer(10 "vgroove") Layer(11 "outline") - contains board outline and dimensions of all panel sub-sets (individual board dimensions, route-line widths, margins etc) Layer(12 "silk") Layer(13 "silk") When I export to Gerber I end up with a .outline file containing just the panel outline and no internal routing. I also get a .fab file in which the vgroove lines don't appear, "route" layer lines are visible but are not as thick as the lines that appear on the PCB "route" layer (and have no associated drill-size). If I export all layer groups I end up with the v-grooves and routing in separate Gerbers as they should appear (along with every via/pin for some reason). What I'd really like is to be able to export different combinations of these mechanical layers (minus the drill holes) eg. one containing just the panel outline, one containing only lines for routing(the panel outline + internal routes), one with just the v-grooves, one marking the outline of the individual boards (ie the panel outline + v-grooves + internal routes) or other combinations as needed. Is there any way to generate these type of Gerbers from within PCB? If what I want to do isn't possible, are the any suggestions as to the best way to add this feature? Regards, Tom Pope _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user