On Jun 6, 2011, at 12:13 PM, Ethan Swint wrote: > OK- I've been messing around with hierarchy for the first time, but I'm a bit > lost. I've got an asymmetric phase leg inverter with three phases, for which > I was planning to use hierarchy to make updating components more resistant to > operator error. I have a sub-sch file and a symbol file and it works as it > should, for which I followed the "gTAG" example that ships with gEDA. > > My problem then comes when I try to create the PCB. Components there take on > the refdes "A/D?", as opposed to "A/D1", "A/D2", etc. I did run across > http://www.bourbonstreetsoftware.com/GEDABlocks.html, but I was hoping to > find something a bit more automatic. My Bing-fu and Google-fu have failed > me, as well. > > My gnetlistrc file consists of: > (hierarchy-netattrib-mangle "disabled") > (hierarchy-netname-mangle "disabled") > (hierarchy-uref-mangle "disabled")
Well, with those settings in gnetlistrc, you've turned off the renaming of nets and components in the subcircuits. So all of the components are duplicated between similar subcircuits, and all nets are shorted between similar subcircuits. Use (hierarchy-netattrib-mangle "disabled") only if *every* net named in a net= attribute should be global. Otherwise, such nets are local, and you'll have to connect them explicitly between levels if that's required. Use (hierarchy-netname-mangle "disabled") and (hierarchy-uref-mangle "disabled") only if *every* subcircuit has distinct schematics. John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ j...@noqsi.com _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
