I am trying to synthesice a simple adder, and I am getting errors like this.
Does anybody know whats going wrong ?
module addc(A, B, CIN, COUT, Q);
input A, B, CIN;
output COUT, Q;
assign Q=A ^ B ^ CIN;
assign COUT= (A & B) | (A & CIN) | (B & CIN);
endmodulebash-2.05b$ ../tools/bin/iverilog -S addc.v
Passes
bash-2.05b$ ../tools/bin/iverilog -tfpga addc.v UNSUPPORTED LOGIC TYPE: 19 UNSUPPORTED LOGIC TYPE: 19 UNSUPPORTED LOGIC TYPE: 1 UNSUPPORTED LOGIC TYPE: 1 UNSUPPORTED LOGIC TYPE: 1 bash-2.05b$
Gives the above, the problem is that I cannot make sence of the error messages.
/ thanks, Lars Segerlund.
