Since there's been a lot of discussion about digital design tools recently, perhaps people need to be reminded about the OpenCores project?
http://www.opencores.org/ Amongst other things, there was some discussion on the OC list about building an open-source synthesis tool a couple of months ago. You can check the archives to see if anything came of it. (I don't think anything did . . . .) And as for a VHDL source complier, they have a couple listed on thier links page: http://www.opencores.org/OIPC/tool.shtml There is also a command line VHDL tool called Alliance which I tried briefly once: http://www-asim.lip6.fr/recherche/alliance/doc/jumpstart/VHDL-Subset/VHDL.html I didn't like it, but that was about 5 years ago & I was new to HDL design anyway. It might have improved since then, or it may not have been bad in the first place . . . . If you can switch to Verilog, then Icarus Verilog rocks -- I've used it to do a couple of small-to-mid sized projects. As for a waveform viewer, GTKWave is the tool of choice, IMHO: http://www.cs.man.ac.uk/apt/tools/gtkwave/ Stuart > > Can someone recommend a open source VHDL compiler that they like using. > I have to simulate a control unit on a processor and I also need a way > to print out the output of the different timing signals. I currently use > vsim (mentor graphics) on the school server but I will be traveling over > the holiday and without a network connection plus you can only spend so > much time with your family. > > Thank you. > > -- > Eric N. <[EMAIL PROTECTED]> > >
