What would cause PCB to not properly maintain it's rats nest and/or netlist? In particular, over the course of adding rats to a board I'm working on, moving parts, changing out parts for others, etc., PCB has made a mess of the netlist it saves with the board. The rats themselves *look* right when they're drawn, but the list data doesn't match what's being drawn.
In the Netlist window, I find several duplicate entries, for example "ratDrawn1" appears several times, each time with a different pin list, some of which are outdated. I've had to erase all of the rats and the netlist section from the PCB drawing file using a text editor, and start over from scratch. This board was not created using gEDA's schematic capture tools, rather I decided to lay it out manually (gschema is too buggy right now, sorry). -- "Sometimes paranoia can be helpful. Usually it isn't, and when you learn that, life improves." Vanessa Dannenberg