> > > If you split the plane, you run the risk of running tracks over > > > slots and other GND structures in your board which can > > > radiate/receive & can contribute to SI problems. > > > > Actually, I think I can easily avoid this. The I/O block is near the > > edge anyway, so the only things that go there are the things that need > > the isolation. The 10baset is also not much of a problem, it's near > > the P/S anyway and the gap would only surround the analog half of the > > chip and the magnetics. > > The reason to use one plane is that it is easy. If you try to do a > split plane on an analog/digital design of reasonable component > count/complexity, you end up gerrymandering the two GND planes to pick > up all the different analog & digital nets. You also have to think > harder during placement about how to place and orient each component > to facilitate the two planes [1]. This takes time, and > there is always the possiblity of an error in which some current takes > a return path you didn't anticipate, and you end up with noise. > > In any event, you'll need to > classify each net as either analog or digital, and then make sure that > the correct GND plane runs underneath it. If you're worried about EMI > pick-up, it's particularly important that all nets travel over their > associated GND planes. Don't allow any loops since they are the > structures which are most sensitive to magnetic pick-up.
One other thing: Even if you have the correct GND plane underneath each and every track on your board, a split-plane design still has the question of how the currents flow inside each mixed-signal component. If I have an A/D or a PIC with some analog and some digital inputs, how do I know that an analog signal current isn't feeding into a digital path somewhere in the chip and getting dumped into DGND instead of AGND, thereby creating the possibility of a big current loop as the return current tries to find its way back along the DGND plane to the AGND plane and then back to its source? Stuart
