[gem5-dev] changeset in gem5: inorder: se compile fixes

[Korey Sewell]

changeset 97571750fadf in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=97571750fadf
description:
        inorder: se compile fixes

diffstat:

 src/cpu/inorder/cpu.cc                  |  3 +++
 src/cpu/inorder/resources/cache_unit.cc |  2 +-
 2 files changed, 4 insertions(+), 1 deletions(-)

diffs (27 lines):

diff -r b52a89442a56 -r 97571750fadf src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc    Sun Jun 19 21:43:41 2011 -0400
+++ b/src/cpu/inorder/cpu.cc    Sun Jun 19 21:43:42 2011 -0400
@@ -702,7 +702,10 @@
 
     ++numCycles;
 
+#if FULL_SYSTEM
     checkForInterrupts();
+#endif
+
     bool pipes_idle = true;
     //Tick each of the stages
     for (int stNum=NumStages - 1; stNum >= 0 ; stNum--) {
diff -r b52a89442a56 -r 97571750fadf src/cpu/inorder/resources/cache_unit.cc
--- a/src/cpu/inorder/resources/cache_unit.cc   Sun Jun 19 21:43:41 2011 -0400
+++ b/src/cpu/inorder/resources/cache_unit.cc   Sun Jun 19 21:43:42 2011 -0400
@@ -454,8 +454,8 @@
         // schedule a time to process the tlb miss.
         // latency hardcoded to 1 (for now), but will be updated
         // when timing translation gets added in
+        unsigned slot_idx = cache_req->getSlot();
         scheduleEvent(slot_idx, 1);
-        unsigned slot_idx = cache_req->getSlot();
 #endif
 
         // Mark it as complete so it can pass through next stage.
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