changeset a6aacf190f14 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a6aacf190f14
description:
        inorder: se: squash after syscalls

diffstat:

 src/cpu/inorder/cpu.cc              |  11 ++++++++++-
 src/cpu/inorder/inorder_dyn_inst.hh |   2 +-
 2 files changed, 11 insertions(+), 2 deletions(-)

diffs (33 lines):

diff -r 61f7e127f9a0 -r a6aacf190f14 src/cpu/inorder/cpu.cc
--- a/src/cpu/inorder/cpu.cc    Sun Jun 19 21:43:42 2011 -0400
+++ b/src/cpu/inorder/cpu.cc    Sun Jun 19 21:43:42 2011 -0400
@@ -1713,7 +1713,16 @@
 void
 InOrderCPU::syscallContext(Fault fault, ThreadID tid, DynInstPtr inst, int 
delay)
 {
-    //@todo: squash behind syscall
+    // Syscall must be non-speculative, so squash from last stage
+    unsigned squash_stage = NumStages - 1;
+    inst->setSquashInfo(squash_stage);
+
+    // Squash In Pipeline Stage
+    pipelineStage[squash_stage]->setupSquash(inst, tid);
+
+    // Schedule Squash Through-out Resource Pool
+    resPool->scheduleEvent(
+        (InOrderCPU::CPUEventType)ResourcePool::SquashAll, inst, 0);
     scheduleCpuEvent(Syscall, fault, tid, inst, delay, Syscall_Pri);
 }
 
diff -r 61f7e127f9a0 -r a6aacf190f14 src/cpu/inorder/inorder_dyn_inst.hh
--- a/src/cpu/inorder/inorder_dyn_inst.hh       Sun Jun 19 21:43:42 2011 -0400
+++ b/src/cpu/inorder/inorder_dyn_inst.hh       Sun Jun 19 21:43:42 2011 -0400
@@ -867,7 +867,7 @@
     void setFloatSrc(int idx, FloatReg val);
     void setFloatRegBitsSrc(int idx, TheISA::FloatRegBits val);
 
-    uint64_t* getIntSrcPtr(int idx) { return &instSrc[idx].intVal; }
+    TheISA::IntReg* getIntSrcPtr(int idx) { return &instSrc[idx].intVal; }
     uint64_t readIntSrc(int idx) { return instSrc[idx].intVal; }
 
     /** These Instructions read a integer/float/misc. source register
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