changeset 6fd8d0432d8d in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=6fd8d0432d8d
description:
        Pseudoinst: Add an initParam pseudo inst function.

diffstat:

 src/arch/alpha/isa/decoder.isa                |  2 +-
 src/arch/arm/isa/insts/m5ops.isa              |  2 +-
 src/arch/x86/isa/decoder/two_byte_opcodes.isa |  3 +--
 src/sim/pseudo_inst.cc                        |  6 ++++++
 src/sim/pseudo_inst.hh                        |  1 +
 5 files changed, 10 insertions(+), 4 deletions(-)

diffs (64 lines):

diff -r e6f58919f7d3 -r 6fd8d0432d8d src/arch/alpha/isa/decoder.isa
--- a/src/arch/alpha/isa/decoder.isa    Sat Sep 17 12:34:03 2011 -0400
+++ b/src/arch/alpha/isa/decoder.isa    Sun Sep 18 23:26:39 2011 -0700
@@ -985,7 +985,7 @@
                 PseudoInst::loadsymbol(xc->tcBase());
             }}, No_OpClass, IsNonSpeculative);
             0x30: initparam({{
-                Ra = xc->tcBase()->getCpuPtr()->system->init_param;
+                Ra = PseudoInst::initParam(xc->tcBase());
             }});
 #endif
             0x40: resetstats({{
diff -r e6f58919f7d3 -r 6fd8d0432d8d src/arch/arm/isa/insts/m5ops.isa
--- a/src/arch/arm/isa/insts/m5ops.isa  Sat Sep 17 12:34:03 2011 -0400
+++ b/src/arch/arm/isa/insts/m5ops.isa  Sun Sep 18 23:26:39 2011 -0700
@@ -203,7 +203,7 @@
 
     initparamCode = '''
 #if FULL_SYSTEM
-    Rt = xc->tcBase()->getCpuPtr()->system->init_param;
+    Rt = PseudoInst::initParam(xc->tcBase());
 #endif
     '''
 
diff -r e6f58919f7d3 -r 6fd8d0432d8d 
src/arch/x86/isa/decoder/two_byte_opcodes.isa
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa     Sat Sep 17 12:34:03 
2011 -0400
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa     Sun Sep 18 23:26:39 
2011 -0700
@@ -161,8 +161,7 @@
                         }}, IsNonSpeculative);
 #if FULL_SYSTEM
                         0x30: m5initparam({{
-                            Rax = xc->tcBase()->getCpuPtr()->
-                                      system->init_param;
+                            Rax = PseudoInst::initParam(xc->tcBase());
                         }}, IsNonSpeculative);
                         0x31: m5loadsymbol({{
                             PseudoInst::loadsymbol(xc->tcBase());
diff -r e6f58919f7d3 -r 6fd8d0432d8d src/sim/pseudo_inst.cc
--- a/src/sim/pseudo_inst.cc    Sat Sep 17 12:34:03 2011 -0400
+++ b/src/sim/pseudo_inst.cc    Sun Sep 18 23:26:39 2011 -0700
@@ -260,6 +260,12 @@
     debugSymbolTable->insert(addr,symbol);
 }
 
+uint64_t
+initParam(ThreadContext *tc)
+{
+    return tc->getCpuPtr()->system->init_param;
+}
+
 #endif
 
 
diff -r e6f58919f7d3 -r 6fd8d0432d8d src/sim/pseudo_inst.hh
--- a/src/sim/pseudo_inst.hh    Sat Sep 17 12:34:03 2011 -0400
+++ b/src/sim/pseudo_inst.hh    Sun Sep 18 23:26:39 2011 -0700
@@ -56,6 +56,7 @@
     uint64_t offset);
 void loadsymbol(ThreadContext *xc);
 void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
+uint64_t initParam(ThreadContext *xc);
 #endif
 
 uint64_t rpns(ThreadContext *tc);
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