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Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan Binkert. Summary ------- stats: ruby stats conversion 2.0 ---- another pass through merging ruby stats w/gem5 style ---- @done get rid of clearstats and printstats add name() functions ---- @todo fix dynamically allocated stats Diffs ----- src/mem/ruby/buffers/MessageBuffer.hh 30a97c4198df src/mem/ruby/buffers/MessageBuffer.cc 30a97c4198df src/mem/ruby/common/Driver.hh 30a97c4198df src/mem/ruby/network/Network.hh 30a97c4198df src/mem/ruby/network/Topology.hh 30a97c4198df src/mem/ruby/network/Topology.cc 30a97c4198df src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh 30a97c4198df src/mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.cc 30a97c4198df src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh 30a97c4198df src/mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.cc 30a97c4198df src/mem/ruby/network/simple/PerfectSwitch.hh 30a97c4198df src/mem/ruby/network/simple/PerfectSwitch.cc 30a97c4198df src/mem/ruby/network/simple/SimpleNetwork.hh 30a97c4198df src/mem/ruby/network/simple/SimpleNetwork.cc 30a97c4198df src/mem/ruby/network/simple/Switch.hh 30a97c4198df src/mem/ruby/network/simple/Switch.cc 30a97c4198df src/mem/ruby/network/simple/Throttle.hh 30a97c4198df src/mem/ruby/network/simple/Throttle.cc 30a97c4198df src/mem/ruby/profiler/AddressProfiler.hh 30a97c4198df src/mem/ruby/profiler/AddressProfiler.cc 30a97c4198df src/mem/ruby/profiler/CacheProfiler.hh 30a97c4198df src/mem/ruby/profiler/CacheProfiler.cc 30a97c4198df src/mem/ruby/profiler/MemCntrlProfiler.hh 30a97c4198df src/mem/ruby/profiler/MemCntrlProfiler.cc 30a97c4198df src/mem/ruby/profiler/Profiler.hh 30a97c4198df src/mem/ruby/profiler/Profiler.cc 30a97c4198df src/mem/ruby/recorder/Tracer.cc 30a97c4198df src/mem/ruby/slicc_interface/AbstractController.hh 30a97c4198df src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh 30a97c4198df src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.cc 30a97c4198df src/mem/ruby/system/CacheMemory.hh 30a97c4198df src/mem/ruby/system/CacheMemory.cc 30a97c4198df src/mem/ruby/system/MemoryControl.hh 30a97c4198df src/mem/ruby/system/MemoryControl.cc 30a97c4198df src/mem/ruby/system/Sequencer.hh 30a97c4198df src/mem/ruby/system/Sequencer.cc 30a97c4198df src/mem/ruby/system/System.hh 30a97c4198df src/mem/ruby/system/System.cc 30a97c4198df src/mem/ruby/system/WireBuffer.hh 30a97c4198df src/mem/ruby/system/WireBuffer.cc 30a97c4198df src/mem/slicc/symbols/StateMachine.py 30a97c4198df Diff: http://reviews.m5sim.org/r/888/diff Testing ------- Thanks, Korey _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
