changeset c36441eed919 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=c36441eed919
description:
Faults: Turn off arch/faults.hh
Because there are no longer architecture independent but specialized
functions
in arch/XXX/faults.hh, code that isn't using the faults from a
particular ISA
no longer needs to be able to include them through the switching header
file
arch/faults.hh. By removing that header file (arch/faults.hh), the
potential
interface between ISA code and non ISA code is narrowed.
diffstat:
src/arch/SConscript | 1 -
src/cpu/base_dyn_inst.hh | 2 +-
src/cpu/inorder/comm.hh | 1 -
src/cpu/inorder/inorder_dyn_inst.cc | 2 +-
src/cpu/inorder/inorder_dyn_inst.hh | 2 +-
src/cpu/inorder/thread_state.hh | 1 -
src/cpu/o3/lsq_unit.hh | 2 +-
src/cpu/ozone/cpu_impl.hh | 1 -
src/cpu/ozone/lsq_unit.hh | 2 +-
src/cpu/ozone/lsq_unit_impl.hh | 2 +-
src/cpu/ozone/lw_lsq.hh | 2 +-
src/cpu/ozone/lw_lsq_impl.hh | 2 +-
src/cpu/simple/base.cc | 2 +-
13 files changed, 9 insertions(+), 13 deletions(-)
diffs (208 lines):
diff -r c80758736323 -r c36441eed919 src/arch/SConscript
--- a/src/arch/SConscript Tue Feb 07 04:43:05 2012 -0800
+++ b/src/arch/SConscript Tue Feb 07 04:43:21 2012 -0800
@@ -43,7 +43,6 @@
# List of headers to generate
isa_switch_hdrs = Split('''
- faults.hh
interrupts.hh
isa.hh
isa_traits.hh
diff -r c80758736323 -r c36441eed919 src/cpu/base_dyn_inst.hh
--- a/src/cpu/base_dyn_inst.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/base_dyn_inst.hh Tue Feb 07 04:43:21 2012 -0800
@@ -50,7 +50,6 @@
#include <string>
#include <queue>
-#include "arch/faults.hh"
#include "arch/utility.hh"
#include "base/fast_alloc.hh"
#include "base/trace.hh"
@@ -64,6 +63,7 @@
#include "cpu/translation.hh"
#include "mem/packet.hh"
#include "sim/byteswap.hh"
+#include "sim/fault_fwd.hh"
#include "sim/system.hh"
#include "sim/tlb.hh"
diff -r c80758736323 -r c36441eed919 src/cpu/inorder/comm.hh
--- a/src/cpu/inorder/comm.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/inorder/comm.hh Tue Feb 07 04:43:21 2012 -0800
@@ -34,7 +34,6 @@
#include <vector>
-#include "arch/faults.hh"
#include "arch/isa_traits.hh"
#include "base/types.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
diff -r c80758736323 -r c36441eed919 src/cpu/inorder/inorder_dyn_inst.cc
--- a/src/cpu/inorder/inorder_dyn_inst.cc Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/inorder/inorder_dyn_inst.cc Tue Feb 07 04:43:21 2012 -0800
@@ -34,7 +34,6 @@
#include <sstream>
#include <string>
-#include "arch/faults.hh"
#include "base/bigint.hh"
#include "base/cp_annotate.hh"
#include "base/cprintf.hh"
@@ -45,6 +44,7 @@
#include "cpu/exetrace.hh"
#include "debug/InOrderDynInst.hh"
#include "mem/request.hh"
+#include "sim/fault_fwd.hh"
#include "sim/full_system.hh"
using namespace std;
diff -r c80758736323 -r c36441eed919 src/cpu/inorder/inorder_dyn_inst.hh
--- a/src/cpu/inorder/inorder_dyn_inst.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/inorder/inorder_dyn_inst.hh Tue Feb 07 04:43:21 2012 -0800
@@ -37,7 +37,6 @@
#include <list>
#include <string>
-#include "arch/faults.hh"
#include "arch/isa_traits.hh"
#include "arch/mt.hh"
#include "arch/types.hh"
@@ -58,6 +57,7 @@
#include "cpu/thread_context.hh"
#include "debug/InOrderDynInst.hh"
#include "mem/packet.hh"
+#include "sim/fault_fwd.hh"
#include "sim/system.hh"
#if THE_ISA == ALPHA_ISA
diff -r c80758736323 -r c36441eed919 src/cpu/inorder/thread_state.hh
--- a/src/cpu/inorder/thread_state.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/inorder/thread_state.hh Tue Feb 07 04:43:21 2012 -0800
@@ -31,7 +31,6 @@
#ifndef __CPU_INORDER_THREAD_STATE_HH__
#define __CPU_INORDER_THREAD_STATE_HH__
-#include "arch/faults.hh"
#include "arch/isa_traits.hh"
#include "base/callback.hh"
#include "base/output.hh"
diff -r c80758736323 -r c36441eed919 src/cpu/o3/lsq_unit.hh
--- a/src/cpu/o3/lsq_unit.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/o3/lsq_unit.hh Tue Feb 07 04:43:21 2012 -0800
@@ -37,7 +37,6 @@
#include <map>
#include <queue>
-#include "arch/faults.hh"
#include "arch/generic/debugfaults.hh"
#include "arch/isa_traits.hh"
#include "arch/locked_mem.hh"
@@ -50,6 +49,7 @@
#include "debug/LSQUnit.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
+#include "sim/fault_fwd.hh"
struct DerivO3CPUParams;
diff -r c80758736323 -r c36441eed919 src/cpu/ozone/cpu_impl.hh
--- a/src/cpu/ozone/cpu_impl.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/ozone/cpu_impl.hh Tue Feb 07 04:43:21 2012 -0800
@@ -30,7 +30,6 @@
*/
#include "arch/alpha/osfpal.hh"
-#include "arch/faults.hh"
#include "arch/isa_traits.hh" // For MachInst
#include "arch/kernel_stats.hh"
#include "arch/tlb.hh"
diff -r c80758736323 -r c36441eed919 src/cpu/ozone/lsq_unit.hh
--- a/src/cpu/ozone/lsq_unit.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/ozone/lsq_unit.hh Tue Feb 07 04:43:21 2012 -0800
@@ -35,13 +35,13 @@
#include <map>
#include <queue>
-#include "arch/faults.hh"
#include "arch/types.hh"
#include "base/hashmap.hh"
#include "config/the_isa.hh"
#include "cpu/inst_seq.hh"
#include "mem/mem_interface.hh"
//#include "mem/page_table.hh"
+#include "sim/fault_fwd.hh"
#include "sim/sim_object.hh"
class PageTable;
diff -r c80758736323 -r c36441eed919 src/cpu/ozone/lsq_unit_impl.hh
--- a/src/cpu/ozone/lsq_unit_impl.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/ozone/lsq_unit_impl.hh Tue Feb 07 04:43:21 2012 -0800
@@ -28,10 +28,10 @@
* Authors: Kevin Lim
*/
-#include "arch/faults.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
#include "cpu/ozone/lsq_unit.hh"
+#include "sim/fault_fwd.hh"
template <class Impl>
OzoneLSQ<Impl>::StoreCompletionEvent::StoreCompletionEvent(int store_idx,
diff -r c80758736323 -r c36441eed919 src/cpu/ozone/lw_lsq.hh
--- a/src/cpu/ozone/lw_lsq.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/ozone/lw_lsq.hh Tue Feb 07 04:43:21 2012 -0800
@@ -36,7 +36,6 @@
#include <map>
#include <queue>
-#include "arch/faults.hh"
#include "arch/types.hh"
#include "base/fast_alloc.hh"
#include "base/hashmap.hh"
@@ -46,6 +45,7 @@
#include "mem/port.hh"
//#include "mem/page_table.hh"
#include "sim/debug.hh"
+#include "sim/fault_fwd.hh"
#include "sim/sim_object.hh"
class MemObject;
diff -r c80758736323 -r c36441eed919 src/cpu/ozone/lw_lsq_impl.hh
--- a/src/cpu/ozone/lw_lsq_impl.hh Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/ozone/lw_lsq_impl.hh Tue Feb 07 04:43:21 2012 -0800
@@ -28,12 +28,12 @@
* Authors: Kevin Lim
*/
-#include "arch/faults.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
#include "cpu/checker/cpu.hh"
#include "cpu/ozone/lw_lsq.hh"
+#include "sim/fault_fwd.hh"
template<class Impl>
OzoneLWLSQ<Impl>::WritebackEvent::WritebackEvent(DynInstPtr &_inst, PacketPtr
_pkt,
diff -r c80758736323 -r c36441eed919 src/cpu/simple/base.cc
--- a/src/cpu/simple/base.cc Tue Feb 07 04:43:05 2012 -0800
+++ b/src/cpu/simple/base.cc Tue Feb 07 04:43:21 2012 -0800
@@ -40,7 +40,6 @@
* Authors: Steve Reinhardt
*/
-#include "arch/faults.hh"
#include "arch/kernel_stats.hh"
#include "arch/stacktrace.hh"
#include "arch/tlb.hh"
@@ -74,6 +73,7 @@
#include "params/BaseSimpleCPU.hh"
#include "sim/byteswap.hh"
#include "sim/debug.hh"
+#include "sim/faults.hh"
#include "sim/full_system.hh"
#include "sim/sim_events.hh"
#include "sim/sim_object.hh"
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev