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Review request for Default. Description ------- Changeset 8880:97c5fbb8d063 --------------------------- se.py: Changes to ruby portion due to SE/FS merge With the SE/FS merge, interrupt controller is created irrespective of the mode. Since interrupts do not go through the Ruby memory system, a separate bus is required for the interrupt controller and the devices. This patch creates the piobus and the interrupt controller in SE mode for Ruby. Diffs ----- configs/example/se.py 347fc850752c Diff: http://reviews.gem5.org/r/1079/diff/ Testing ------- Thanks, Nilay Vaish _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
