On Thu, Mar 29, 2012 at 3:12 PM, Rodrigues, Arun F <[email protected]> wrote: > > > On 3/29/12 11:49 AM, "Anirudh Sivaraman" <[email protected]> wrote: > >>Thank you very much for the responses ! I had no idea of SST , but it >>definitely looks like a great project for me to start looking for >>ideas. Reg. the TCP timeouts, I had forgotten that gem5 skips over >>idle cycles, so in effect I either need to make the time slice for >>syncing much lower than the TCP timeout or I need to disable this >>'cycle-skipping'. > > What we did initially was to disable the cycle-skipping, but this lead to > some performance degradation. So instead, we just make sure that GeM5 is > called at least once per lookahead period - I.e. we can skip up to > <lookahead> number of cycles. This improved performance by about 20%. > > If you run into any issues with GeM5/SST, there is an SST mailing list > which might be useful for the more SST-related parts. (or documentation > is... not great...) > >> >>While on the topic of SST, do you have any calibration studies wrt >>other potentially more-accurate simulators (or) real hardware ? I >>would be very interested in looking at any such studies. > > We are currently doing some of that now, mainly for x86 architectures, > comparing against real hardware. Actually, we've been running into some > issues with the cache accuracy and prefetchers. I'll see what exact > numbers I can scrounge up. >
Thanks for the information and do let me know if you have any numbers . I 'll keep the cycle skipping overhead in mind and get back to you if turns out to be too much for me. Anirudh > > _______________________________________________ > gem5-dev mailing list > [email protected] > http://m5sim.org/mailman/listinfo/gem5-dev _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
