changeset bbceb6297329 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=bbceb6297329
description:
CPU: Tidy up some formatting and a DPRINTF in the simple CPU base class.
Put the { on the same line as the if and put a space between the if and
the
open paren. Also, use the # format modifier which puts a 0x in front of
hex
values automatically. If the ExtMachInst type isn't integral and
actually
prints something more complicated, the # falls away harmlessly and we
aren't
left with a phantom 0x followed by a bunch of unrelated text.
diffstat:
src/cpu/simple/base.cc | 5 ++---
1 files changed, 2 insertions(+), 3 deletions(-)
diffs (19 lines):
diff -r 3c7232fec7fd -r bbceb6297329 src/cpu/simple/base.cc
--- a/src/cpu/simple/base.cc Sun Apr 15 01:07:39 2012 -0700
+++ b/src/cpu/simple/base.cc Sun Apr 15 12:35:49 2012 -0700
@@ -414,13 +414,12 @@
}
//If we decoded an instruction this "tick", record information about it.
- if(curStaticInst)
- {
+ if (curStaticInst) {
#if TRACING_ON
traceData = tracer->getInstRecord(curTick(), tc,
curStaticInst, thread->pcState(), curMacroStaticInst);
- DPRINTF(Decode,"Decode: Decoded %s instruction: 0x%x\n",
+ DPRINTF(Decode,"Decode: Decoded %s instruction: %#x\n",
curStaticInst->getName(), curStaticInst->machInst);
#endif // TRACING_ON
}
_______________________________________________
gem5-dev mailing list
[email protected]
http://m5sim.org/mailman/listinfo/gem5-dev
