> On April 21, 2012, 8:10 p.m., Gabe Black wrote: > > The fp microops are pretty underdeveloped, but my impression was that there > > wasn't a lot of partial updating of the FP condition codes, and that would > > make this unnecessary. Could you please check how they're updated and > > report back? If setting the flags are optional but an all or nothing sort > > of thing, we don't need to add this code.
I think there are two fp microops that read/write the condition codes. Since the CC register itself is not separate, any check that is introduced on that register, will be in force even for fp microops. The check that I intend to introduce (it is there is one of the patches posted on the board), works on the cc bits that would read/written by the microop. Hence, the need for the change to the fp microops. I think it is possible to keep these changes to only those two microops. I may try that out once we converge on the final solution for total set of patches. - Nilay ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1152/#review2570 ----------------------------------------------------------- On April 21, 2012, 1:15 p.m., Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1152/ > ----------------------------------------------------------- > > (Updated April 21, 2012, 1:15 p.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 8960:5752699105b1 > --------------------------- > X86: Add ext and cc fields to FP microops > The cc and ext fields in integer microops hold the flags the microop is > going to read and write respectively. These fields are being provided in > FP microops. Later on this would help in deciding at run time whether or > not certain flags need to be read or written. Currently these are set to 0. > > > Diffs > ----- > > src/arch/x86/insts/microfpop.hh 0bba1c59b4d1 > src/arch/x86/isa/microops/fpop.isa 0bba1c59b4d1 > > Diff: http://reviews.gem5.org/r/1152/diff/ > > > Testing > ------- > > > Thanks, > > Nilay Vaish > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
