[gem5-dev] changeset in gem5: ARM: Fix incorrect use of not operators in ar...

[Ali Saidi]

changeset d5f9445010da in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=d5f9445010da
description:
        ARM: Fix incorrect use of not operators in arm devices

diffstat:

 src/dev/arm/rtc_pl031.cc      |  2 +-
 src/dev/arm/timer_cpulocal.cc |  4 ++--
 src/dev/arm/timer_sp804.cc    |  2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diffs (45 lines):

diff -r e68dd2ba4fa4 -r d5f9445010da src/dev/arm/rtc_pl031.cc
--- a/src/dev/arm/rtc_pl031.cc  Thu May 10 18:04:27 2012 -0500
+++ b/src/dev/arm/rtc_pl031.cc  Thu May 10 18:04:27 2012 -0500
@@ -191,7 +191,7 @@
     rawInt = true;
     bool old_pending = pendingInt;
     pendingInt = maskInt & rawInt;
-    if (pendingInt && ~old_pending) {
+    if (pendingInt && !old_pending) {
         DPRINTF(Timer, "-- Causing interrupt\n");
         gic->sendInt(intNum);
     }
diff -r e68dd2ba4fa4 -r d5f9445010da src/dev/arm/timer_cpulocal.cc
--- a/src/dev/arm/timer_cpulocal.cc     Thu May 10 18:04:27 2012 -0500
+++ b/src/dev/arm/timer_cpulocal.cc     Thu May 10 18:04:27 2012 -0500
@@ -291,7 +291,7 @@
     bool old_pending = pendingIntTimer;
     if (timerControl.intEnable)
         pendingIntTimer = true;
-    if (pendingIntTimer && ~old_pending) {
+    if (pendingIntTimer && !old_pending) {
         DPRINTF(Timer, "-- Causing interrupt\n");
         parent->gic->sendPPInt(intNumTimer, cpuNum);
     }
@@ -322,7 +322,7 @@
         //XXX: Should we ever support a true watchdog reset?
     }
 
-    if (pendingIntWatchdog && ~old_pending) {
+    if (pendingIntWatchdog && !old_pending) {
         DPRINTF(Timer, "-- Causing interrupt\n");
         parent->gic->sendPPInt(intNumWatchdog, cpuNum);
     }
diff -r e68dd2ba4fa4 -r d5f9445010da src/dev/arm/timer_sp804.cc
--- a/src/dev/arm/timer_sp804.cc        Thu May 10 18:04:27 2012 -0500
+++ b/src/dev/arm/timer_sp804.cc        Thu May 10 18:04:27 2012 -0500
@@ -205,7 +205,7 @@
     bool old_pending = pendingInt;
     if (control.intEnable)
         pendingInt = true;
-    if (pendingInt && ~old_pending) {
+    if (pendingInt && !old_pending) {
         DPRINTF(Timer, "-- Causing interrupt\n");
         parent->gic->sendInt(intNum);
     }
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