Hi everyone,
I tripped an assertion in m5/src/mem/cache/cache_impl.hh line 906. assert(pkt->req->masterId() < system->maxMasters()); Judging from the next line, shouldn't it be assert(target->pkt->req->masterId() < system->maxMasters()) ? Please advice. Best regards, Xiang Jiang _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
