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Do they also need to be connected for the other ISAs? - Anthony Gutierrez On Aug. 31, 2012, 4:38 p.m., Joel Hestness wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1384/ > ----------------------------------------------------------- > > (Updated Aug. 31, 2012, 4:38 p.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9183:06ff4a96d7e0 > --------------------------- > se.py Ruby: Connect TLB walker ports > > In order to ensure correct functionality of switch CPUs, the TLB walker ports > must be connected to the Ruby system in x86 simulation. > > This fixes x86 assertion failures that the TLB walker ports are not connected > during the CPU switch process. > > > Diffs > ----- > > configs/example/se.py 42807286d6cb > > Diff: http://reviews.gem5.org/r/1384/diff/ > > > Testing > ------- > > se.py --ruby checkpointing and restore in timing CPU. Will need to be tested > again when restoring into detailed CPU is working with Ruby. > > > Thanks, > > Joel Hestness > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
