changeset dc386ccc1db9 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=dc386ccc1db9
description:
X86: make use of register predication
The patch introduces two predicates for condition code registers -- one
tests if a register needs to be read, the other tests whether a register
needs to be written to. These predicates are evaluated twice -- during
construction of the microop and during its execution. Register reads
and writes are elided depending on how the predicates evaluate.
diffstat:
src/arch/x86/isa/microops/regop.isa | 287 +++++++++++++++++++----------------
src/arch/x86/isa/operands.isa | 36 ++++-
2 files changed, 188 insertions(+), 135 deletions(-)
diffs (truncated from 573 to 300 lines):
diff -r 46c3a74952ec -r dc386ccc1db9 src/arch/x86/isa/microops/regop.isa
--- a/src/arch/x86/isa/microops/regop.isa Tue Sep 11 09:25:43 2012 -0500
+++ b/src/arch/x86/isa/microops/regop.isa Tue Sep 11 09:33:42 2012 -0500
@@ -438,40 +438,43 @@
flag_code = '''
//Don't have genFlags handle the OF or CF bits
uint64_t mask = CFBit | ECFBit | OFBit;
- uint64_t newFlags = genFlags(ccFlagBits | dfBit | ezfBit,
- ext & ~mask, result, psrc1, op2);
- ezfBit = newFlags & EZFBit;
- dfBit = newFlags & DFBit;
- ccFlagBits = newFlags & ccFlagMask;
+ uint64_t newFlags = genFlags(PredccFlagBits | PreddfBit |
+ PredezfBit, ext & ~mask, result, psrc1, op2);
+ PredezfBit = newFlags & EZFBit;
+ PreddfBit = newFlags & DFBit;
+ PredccFlagBits = newFlags & ccFlagMask;
//If a logic microop wants to set these, it wants to set them to 0.
- cfofBits = cfofBits & ~((CFBit | OFBit) & ext);
- ecfBit = ecfBit & ~(ECFBit & ext);
+ PredcfofBits = PredcfofBits & ~((CFBit | OFBit) & ext);
+ PredecfBit = PredecfBit & ~(ECFBit & ext);
'''
class FlagRegOp(RegOp):
abstract = True
flag_code = '''
- uint64_t newFlags = genFlags(ccFlagBits | cfofBits | dfBit |
- ecfBit | ezfBit, ext, result, psrc1, op2);
- cfofBits = newFlags & cfofMask;
- ecfBit = newFlags & ECFBit;
- ezfBit = newFlags & EZFBit;
- dfBit = newFlags & DFBit;
- ccFlagBits = newFlags & ccFlagMask;
+ uint64_t newFlags = genFlags(PredccFlagBits | PredcfofBits |
+ PreddfBit | PredecfBit | PredezfBit,
+ ext, result, psrc1, op2);
+
+ PredcfofBits = newFlags & cfofMask;
+ PredecfBit = newFlags & ECFBit;
+ PredezfBit = newFlags & EZFBit;
+ PreddfBit = newFlags & DFBit;
+ PredccFlagBits = newFlags & ccFlagMask;
'''
class SubRegOp(RegOp):
abstract = True
flag_code = '''
- uint64_t newFlags = genFlags(ccFlagBits | cfofBits | dfBit |
- ecfBit | ezfBit, ext, result, psrc1,
- ~op2, true);
- cfofBits = newFlags & cfofMask;
- ecfBit = newFlags & ECFBit;
- ezfBit = newFlags & EZFBit;
- dfBit = newFlags & DFBit;
- ccFlagBits = newFlags & ccFlagMask;
+ uint64_t newFlags = genFlags(PredccFlagBits | PredcfofBits |
+ PreddfBit | PredecfBit | PredezfBit,
+ ext, result, psrc1, ~op2, true);
+
+ PredcfofBits = newFlags & cfofMask;
+ PredecfBit = newFlags & ECFBit;
+ PredezfBit = newFlags & EZFBit;
+ PreddfBit = newFlags & DFBit;
+ PredccFlagBits = newFlags & ccFlagMask;
'''
class CondRegOp(RegOp):
@@ -556,11 +559,11 @@
flag_code = '''
if ((-ProdHi & mask(dataSize * 8)) !=
bits(ProdLow, dataSize * 8 - 1)) {
- cfofBits = cfofBits | (ext & (CFBit | OFBit));
- ecfBit = ecfBit | (ext & ECFBit);
+ PredcfofBits = PredcfofBits | (ext & (CFBit | OFBit));
+ PredecfBit = PredecfBit | (ext & ECFBit);
} else {
- cfofBits = cfofBits & ~(ext & (CFBit | OFBit));
- ecfBit = ecfBit & ~(ext & ECFBit);
+ PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit));
+ PredecfBit = PredecfBit & ~(ext & ECFBit);
}
'''
@@ -579,11 +582,11 @@
'''
flag_code = '''
if (ProdHi) {
- cfofBits = cfofBits | (ext & (CFBit | OFBit));
- ecfBit = ecfBit | (ext & ECFBit);
+ PredcfofBits = PredcfofBits | (ext & (CFBit | OFBit));
+ PredecfBit = PredecfBit | (ext & ECFBit);
} else {
- cfofBits = cfofBits & ~(ext & (CFBit | OFBit));
- ecfBit = ecfBit & ~(ext & ECFBit);
+ PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit));
+ PredecfBit = PredecfBit & ~(ext & ECFBit);
}
'''
@@ -682,9 +685,9 @@
big_code = divCode % "DestReg = remaining & mask(dataSize * 8);"
flag_code = '''
if (remaining == 0)
- ezfBit = ezfBit | (ext & EZFBit);
+ PredezfBit = PredezfBit | (ext & EZFBit);
else
- ezfBit = ezfBit & ~(ext & EZFBit);
+ PredezfBit = PredezfBit & ~(ext & EZFBit);
'''
class Divq(RdRegOp):
@@ -715,8 +718,8 @@
if (shiftAmt) {
//Zero out any flags we might modify. This way we only have to
//worry about setting them.
- cfofBits = cfofBits & ~(ext & (CFBit | OFBit));
- ecfBit = ecfBit & ~(ext & ECFBit);
+ PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit));
+ PredecfBit = PredecfBit & ~(ext & ECFBit);
int CFBits = 0;
//Figure out if we -would- set the CF bits if requested.
@@ -727,20 +730,22 @@
//If some combination of the CF bits need to be set, set them.
if ((ext & (CFBit | ECFBit)) && CFBits) {
- cfofBits = cfofBits | (ext & CFBit);
- ecfBit = ecfBit | (ext & ECFBit);
+ PredcfofBits = PredcfofBits | (ext & CFBit);
+ PredecfBit = PredecfBit | (ext & ECFBit);
}
//Figure out what the OF bit should be.
if ((ext & OFBit) && (CFBits ^ bits(DestReg, dataSize * 8 -
1)))
- cfofBits = cfofBits | OFBit;
+ PredcfofBits = PredcfofBits | OFBit;
//Use the regular mechanisms to calculate the other flags.
- uint64_t newFlags = genFlags(ccFlagBits | dfBit | ezfBit,
- ext & ~(CFBit | ECFBit | OFBit), DestReg, psrc1, op2);
- ezfBit = newFlags & EZFBit;
- dfBit = newFlags & DFBit;
- ccFlagBits = newFlags & ccFlagMask;
+ uint64_t newFlags = genFlags(PredccFlagBits | PreddfBit |
+ PredezfBit, ext & ~(CFBit | ECFBit | OFBit),
+ DestReg, psrc1, op2);
+
+ PredezfBit = newFlags & EZFBit;
+ PreddfBit = newFlags & DFBit;
+ PredccFlagBits = newFlags & ccFlagMask;
}
'''
@@ -763,27 +768,29 @@
if (shiftAmt) {
//Zero out any flags we might modify. This way we only have to
//worry about setting them.
- cfofBits = cfofBits & ~(ext & (CFBit | OFBit));
- ecfBit = ecfBit & ~(ext & ECFBit);
+ PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit));
+ PredecfBit = PredecfBit & ~(ext & ECFBit);
//If some combination of the CF bits need to be set, set them.
if ((ext & (CFBit | ECFBit)) &&
shiftAmt <= dataSize * 8 &&
bits(SrcReg1, shiftAmt - 1)) {
- cfofBits = cfofBits | (ext & CFBit);
- ecfBit = ecfBit | (ext & ECFBit);
+ PredcfofBits = PredcfofBits | (ext & CFBit);
+ PredecfBit = PredecfBit | (ext & ECFBit);
}
//Figure out what the OF bit should be.
if ((ext & OFBit) && bits(SrcReg1, dataSize * 8 - 1))
- cfofBits = cfofBits | OFBit;
+ PredcfofBits = PredcfofBits | OFBit;
//Use the regular mechanisms to calculate the other flags.
- uint64_t newFlags = genFlags(ccFlagBits | dfBit | ezfBit,
- ext & ~(CFBit | ECFBit | OFBit), DestReg, psrc1, op2);
- ezfBit = newFlags & EZFBit;
- dfBit = newFlags & DFBit;
- ccFlagBits = newFlags & ccFlagMask;
+ uint64_t newFlags = genFlags(PredccFlagBits | PreddfBit |
+ PredezfBit, ext & ~(CFBit | ECFBit | OFBit),
+ DestReg, psrc1, op2);
+
+ PredezfBit = newFlags & EZFBit;
+ PreddfBit = newFlags & DFBit;
+ PredccFlagBits = newFlags & ccFlagMask;
}
'''
@@ -808,24 +815,26 @@
if (shiftAmt) {
//Zero out any flags we might modify. This way we only have to
//worry about setting them.
- cfofBits = cfofBits & ~(ext & (CFBit | OFBit));
- ecfBit = ecfBit & ~(ext & ECFBit);
+ PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit));
+ PredecfBit = PredecfBit & ~(ext & ECFBit);
//If some combination of the CF bits need to be set, set them.
uint8_t effectiveShift =
(shiftAmt <= dataSize * 8) ? shiftAmt : (dataSize * 8);
if ((ext & (CFBit | ECFBit)) &&
bits(SrcReg1, effectiveShift - 1)) {
- cfofBits = cfofBits | (ext & CFBit);
- ecfBit = ecfBit | (ext & ECFBit);
+ PredcfofBits = PredcfofBits | (ext & CFBit);
+ PredecfBit = PredecfBit | (ext & ECFBit);
}
//Use the regular mechanisms to calculate the other flags.
- uint64_t newFlags = genFlags(ccFlagBits | dfBit | ezfBit,
- ext & ~(CFBit | ECFBit | OFBit), DestReg, psrc1, op2);
- ezfBit = newFlags & EZFBit;
- dfBit = newFlags & DFBit;
- ccFlagBits = newFlags & ccFlagMask;
+ uint64_t newFlags = genFlags(PredccFlagBits | PreddfBit |
+ PredezfBit, ext & ~(CFBit | ECFBit | OFBit),
+ DestReg, psrc1, op2);
+
+ PredezfBit = newFlags & EZFBit;
+ PreddfBit = newFlags & DFBit;
+ PredccFlagBits = newFlags & ccFlagMask;
}
'''
@@ -846,28 +855,30 @@
if (shiftAmt) {
//Zero out any flags we might modify. This way we only have to
//worry about setting them.
- cfofBits = cfofBits & ~(ext & (CFBit | OFBit));
- ecfBit = ecfBit & ~(ext & ECFBit);
+ PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit));
+ PredecfBit = PredecfBit & ~(ext & ECFBit);
//Find the most and second most significant bits of the result.
int msb = bits(DestReg, dataSize * 8 - 1);
int smsb = bits(DestReg, dataSize * 8 - 2);
//If some combination of the CF bits need to be set, set them.
if ((ext & (CFBit | ECFBit)) && msb) {
- cfofBits = cfofBits | (ext & CFBit);
- ecfBit = ecfBit | (ext & ECFBit);
+ PredcfofBits = PredcfofBits | (ext & CFBit);
+ PredecfBit = PredecfBit | (ext & ECFBit);
}
//Figure out what the OF bit should be.
if ((ext & OFBit) && (msb ^ smsb))
- cfofBits = cfofBits | OFBit;
+ PredcfofBits = PredcfofBits | OFBit;
//Use the regular mechanisms to calculate the other flags.
- uint64_t newFlags = genFlags(ccFlagBits | dfBit | ezfBit,
- ext & ~(CFBit | ECFBit | OFBit), DestReg, psrc1, op2);
- ezfBit = newFlags & EZFBit;
- dfBit = newFlags & DFBit;
- ccFlagBits = newFlags & ccFlagMask;
+ uint64_t newFlags = genFlags(PredccFlagBits | PreddfBit |
+ PredezfBit, ext & ~(CFBit | ECFBit | OFBit),
+ DestReg, psrc1, op2);
+
+ PredezfBit = newFlags & EZFBit;
+ PreddfBit = newFlags & DFBit;
+ PredccFlagBits = newFlags & ccFlagMask;
}
'''
@@ -892,28 +903,30 @@
int origCFBit = (cfofBits & CFBit) ? 1 : 0;
//Zero out any flags we might modify. This way we only have to
//worry about setting them.
- cfofBits = cfofBits & ~(ext & (CFBit | OFBit));
- ecfBit = ecfBit & ~(ext & ECFBit);
+ PredcfofBits = PredcfofBits & ~(ext & (CFBit | OFBit));
+ PredecfBit = PredecfBit & ~(ext & ECFBit);
//Figure out what the OF bit should be.
if ((ext & OFBit) && (origCFBit ^
bits(SrcReg1, dataSize * 8 - 1))) {
- cfofBits = cfofBits | OFBit;
+ PredcfofBits = PredcfofBits | OFBit;
}
//If some combination of the CF bits need to be set, set them.
if ((ext & (CFBit | ECFBit)) &&
(realShiftAmt == 0) ? origCFBit :
bits(SrcReg1, realShiftAmt - 1)) {
- cfofBits = cfofBits | (ext & CFBit);
- ecfBit = ecfBit | (ext & ECFBit);
+ PredcfofBits = PredcfofBits | (ext & CFBit);
+ PredecfBit = PredecfBit | (ext & ECFBit);
}
//Use the regular mechanisms to calculate the other flags.
- uint64_t newFlags = genFlags(ccFlagBits | dfBit | ezfBit,
- ext & ~(CFBit | ECFBit | OFBit), DestReg, psrc1, op2);
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