changeset a0ca00815cc4 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=a0ca00815cc4
description:
Configs: SE script fix for Alpha and Ruby simulations
PIO interrupt port is only present for x86. Do not attempt to connect
for other ISAs.
diffstat:
configs/example/se.py | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diffs (24 lines):
diff -r f8c85a7d109f -r a0ca00815cc4 configs/example/se.py
--- a/configs/example/se.py Thu Sep 27 08:59:25 2012 -0400
+++ b/configs/example/se.py Fri Sep 28 09:35:25 2012 -0400
@@ -190,15 +190,17 @@
ruby_port = system.ruby._cpu_ruby_ports[i]
# Create the interrupt controller and connect its ports to Ruby
+ # Note that the interrupt controller is always present but only
+ # in x86 does it have message ports that need to be connected
system.cpu[i].createInterruptController()
- system.cpu[i].interrupts.pio = ruby_port.master
- system.cpu[i].interrupts.int_master = ruby_port.slave
- system.cpu[i].interrupts.int_slave = ruby_port.master
# Connect the cpu's cache ports to Ruby
system.cpu[i].icache_port = ruby_port.slave
system.cpu[i].dcache_port = ruby_port.slave
if buildEnv['TARGET_ISA'] == 'x86':
+ system.cpu[i].interrupts.pio = ruby_port.master
+ system.cpu[i].interrupts.int_master = ruby_port.slave
+ system.cpu[i].interrupts.int_slave = ruby_port.master
system.cpu[i].itb.walker.port = ruby_port.slave
system.cpu[i].dtb.walker.port = ruby_port.slave
else:
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