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Ship it! Ship It! - Nilay Vaish On Oct. 23, 2012, 2:37 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1477/ > ----------------------------------------------------------- > > (Updated Oct. 23, 2012, 2:37 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9312:49b6723410e6 > --------------------------- > dev: Make default clock more reasonable for system and devices > > This patch changes the default system clock from 1THz to 1GHz. This > clock is used by all modules that do not override the default (parent > clock), and primarily affects the IO subsystem. Every DMA device uses > its clock to schedule the next transfer, and the change will thus > cause this inter-transfer delay to be longer. > > The default clock of the bus is removed, as the clock inherited from > the system provides exactly the same value. > > A follow-on patch will bump the stats. > > > Diffs > ----- > > src/mem/Bus.py f634a34f2f0b > src/sim/System.py f634a34f2f0b > > Diff: http://reviews.gem5.org/r/1477/diff/ > > > Testing > ------- > > util/regress all passing (disregarding t1000 and eio) > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
