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Review request for Default. Description ------- Changeset 9414:5e4e5314dd4d --------------------------- cpu: Fix broken thread context handover The thread context handover code used to break when multiple handovers were performed during the same quiesce period. Previously, the thread contexts would assign the TC pointer in the old quiesce event to the new TC. This obviously broke in cases where multiple switches were performed within the same quiesce period, in which case the TC pointer in the quiesce event would point to an old CPU. The new implementation deschedules pending quiesce events in the old TC and schedules a new quiesce event in the new TC. The code has been refactored to remove most of the code duplication. Diffs ----- src/cpu/inorder/thread_context.cc 844f9e724343 src/cpu/o3/thread_context_impl.hh 844f9e724343 src/cpu/simple_thread.hh 844f9e724343 src/cpu/simple_thread.cc 844f9e724343 src/cpu/thread_context.hh 844f9e724343 src/cpu/thread_context.cc 844f9e724343 Diff: http://reviews.gem5.org/r/1565/diff/ Testing ------- Thanks, Ali Saidi _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
