----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1589/#review3726 -----------------------------------------------------------
Ship it! Ship It! - Ali Saidi On Dec. 6, 2012, 8:38 p.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1589/ > ----------------------------------------------------------- > > (Updated Dec. 6, 2012, 8:38 p.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9423:e78361f34a72 > --------------------------- > mem: Add DDR3 and LPDDR2 DRAM controller configurations > > This patch moves the default DRAM parameters from the SimpleDRAM class > to two different subclasses, one for DDR3 and one for LPDDR2. More can > be added as we go forward. > > The regressions that previously used the SimpleDRAM are now using > SimpleDDR3 as this is the most similar configuration. > > > Diffs > ----- > > configs/common/FSConfig.py 844f9e724343 > src/mem/SimpleDRAM.py 844f9e724343 > tests/configs/inorder-timing.py 844f9e724343 > tests/configs/o3-timing-checker.py 844f9e724343 > tests/configs/o3-timing-mp.py 844f9e724343 > tests/configs/o3-timing.py 844f9e724343 > tests/configs/tgen-simple-dram.py 844f9e724343 > > Diff: http://reviews.gem5.org/r/1589/diff/ > > > Testing > ------- > > util/regress all passing (disregarding t1000 and eio) > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
