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(Updated Jan. 21, 2013, 7:07 a.m.) Review request for Default. Summary (updated) ----------------- x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switch Description (updated) ------- Changeset 9478:bb0b8cf71314 --------------------------- x86, cpu: corrects 270c9a75e91f, take over decoder on cpu switch The changes made by the changeset 270c9a75e91f do not work well with switching of cpus. The problem is that decoder for the old thread context holds state that is not taken over by the new decoder. This patch adds a takeOverFrom() function to Decoder class in each ISA. Except for x86, functions in other ISAs are blank. For x86, the function copies state from the old decoder to the new decoder. Diffs (updated) ----- src/arch/alpha/decoder.hh d0aacc54cee9 src/arch/arm/decoder.hh d0aacc54cee9 src/arch/mips/decoder.hh d0aacc54cee9 src/arch/power/decoder.hh d0aacc54cee9 src/arch/sparc/decoder.hh d0aacc54cee9 src/arch/x86/decoder.hh d0aacc54cee9 src/cpu/o3/thread_context_impl.hh d0aacc54cee9 src/cpu/simple_thread.cc d0aacc54cee9 Diff: http://reviews.gem5.org/r/1658/diff/ Testing ------- Thanks, Nilay Vaish _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
