----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1660/ -----------------------------------------------------------
Review request for Default. Description ------- Changeset 9513:86c772cdcb3e --------------------------- cpu: Fix a livelock in the o3 cpu. Check if an instruction just enabled interrupts and we've previously had an interrupt pending that was not handled because interrupts were subsequently disabled before the pipeline reached a place to handle the interrupt. In that case squash now to make sure the interrupt is handled. Diffs ----- src/cpu/o3/commit.hh f9e76b1eb79a src/cpu/o3/commit_impl.hh f9e76b1eb79a Diff: http://reviews.gem5.org/r/1660/diff/ Testing ------- Thanks, Ali Saidi _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
