Hi Amin,
I don't think anyone is planning on supporting this. If you want to make it work, you'll probably have to do this yourself. Thanks, Ali On 29.01.2013 14:08, Amin Farmahini wrote: > Hi, > > In the classic memory system, all caches (L1, L2, L3) should have the same > cache line size. I was wondering if there is any plan to support caches > with different line sizes in the near future? > > Thanks, > Amin > _______________________________________________ > gem5-dev mailing list > gem5-dev@gem5.org > http://m5sim.org/mailman/listinfo/gem5-dev [1] Links: ------ [1] http://m5sim.org/mailman/listinfo/gem5-dev _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
