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src/arch/x86/interrupts.cc <http://reviews.gem5.org/r/1759/#comment3945> I'm not sure what the semantics are supposed to be, but isn't the "clockEdge" function in the clocked object what is more or less expressed in the if/else statement? src/dev/x86/i8042.cc <http://reviews.gem5.org/r/1759/#comment3946> Is this something that happens at boot with never kernels? How difficult would it be to implement it "properly"? - Andreas Hansson On March 8, 2013, 9:57 a.m., Nilay Vaish wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1759/ > ----------------------------------------------------------- > > (Updated March 8, 2013, 9:57 a.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9583:5919a10e6cdd > --------------------------- > x86: changes to apic, keyboard > It is possible that operating system wants to shutdown the > lapic timer by writing timer's initial count to 0. This patch > adds a check that the timer event is only scheduled if the > count is 0. > > The patch also converts few of the panics related to the keyboard > to warnings since we are any way not interested in simulating the > keyboard. > > > Diffs > ----- > > src/arch/x86/interrupts.cc e507dc092ca3 > src/dev/x86/i8042.cc e507dc092ca3 > > Diff: http://reviews.gem5.org/r/1759/diff/ > > > Testing > ------- > > > Thanks, > > Nilay Vaish > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
