----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1858/ -----------------------------------------------------------
Review request for Default. Description ------- Changeset 9689:a9e8c29cb946 --------------------------- dev: Clean up MC146818 register (A & B) handling Rewrite reg A & B handling to use the bitunion stuff instead of bit masking. Add better error messages when the kernel tries to enable unsupported stuff. Diffs ----- src/dev/mc146818.hh 00dca8a9b560 src/dev/mc146818.cc 00dca8a9b560 src/dev/rtcreg.h 00dca8a9b560 Diff: http://reviews.gem5.org/r/1858/diff/ Testing ------- Quick regressions pass (with the exception of 02.insttest and 40.m5threads-test-atomic where I can't find the binaries) for all supported architectures. Thanks, Andreas Sandberg _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
