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Anyone got any input on this one and the other bus-related patches? - Andreas Hansson On April 22, 2013, 3:43 p.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1838/ > ----------------------------------------------------------- > > (Updated April 22, 2013, 3:43 p.m.) > > > Review request for Default. > > > Description > ------- > > Changeset 9679:7e980b7d406c > --------------------------- > mem: Make the buses multi layered > > This patch makes the buses multi layered, and effectively creates a > crossbar structure with distributed contention ports at the > destination ports. Before this patch, a bus could have a single > request, response and snoop response in flight at any time, and with > these changes there can be as many requests as connected slaves (bus > master ports), and as many responses as connected masters (bus slave > ports). > > Together with address interleaving, this patch enables us to create > high-throughput memory interconnects, e.g. 50+ GByte/s. > > > Diffs > ----- > > src/mem/bus.hh c5b24e8ed428 > src/mem/bus.cc c5b24e8ed428 > src/mem/coherent_bus.hh c5b24e8ed428 > src/mem/coherent_bus.cc c5b24e8ed428 > src/mem/noncoherent_bus.hh c5b24e8ed428 > src/mem/noncoherent_bus.cc c5b24e8ed428 > > Diff: http://reviews.gem5.org/r/1838/diff/ > > > Testing > ------- > > All regressions passing after stats updates > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
