> On June 28, 2013, 7:51 a.m., Nilay Vaish wrote: > > src/arch/x86/isa/insts/x87/control/save_and_restore_x87_environment.py, > > line 106 > > <http://reviews.gem5.org/r/1917/diff/2/?file=36103#file36103line106> > > > > Why do we need these eret instructions?
If I understand things correctly, you need to execute eret to return from a microcode sequence (if it's a separate microcode sequence in the microcode rom). There is a new version of this patch that doesn't use microcode rom (I suspected there were issues related to exceptions in microcode, but I'm unsure) in my fixes-x87 branch on GitHub (https://github.com/andysan/gem5/tree/fixes-x87). - Andreas ----------------------------------------------------------- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/1917/#review4483 ----------------------------------------------------------- On June 13, 2013, 6:24 a.m., Andreas Sandberg wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/1917/ > ----------------------------------------------------------- > > (Updated June 13, 2013, 6:24 a.m.) > > > Review request for Default and Gabe Black. > > > Repository: gem5 > > > Description > ------- > > Changeset 9760:f7df7b862186 > --------------------------- > x86: Add support for FLDENV & FNSTENV > > > Diffs > ----- > > src/arch/x86/isa/microasm.isa 9df73385c878 > src/arch/x86/isa/insts/x87/control/save_and_restore_x87_environment.py > 9df73385c878 > src/arch/x86/isa/decoder/x87.isa 9df73385c878 > > Diff: http://reviews.gem5.org/r/1917/diff/ > > > Testing > ------- > > Quick regressions pass. Minor stat differences in full regressions (to be > expected since some instructions aren't no-ops anymore). Solves a bug > triggered by switching between a simulated CPU that tries to save the x87 > state and a virtualized CPU that restores the state (which is completely > bogus unless FNSTENV is implemented). > > > Thanks, > > Andreas Sandberg > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
