On Thu, 1 Aug 2013, Steve Reinhardt wrote:
On Thu, Aug 1, 2013 at 11:08 AM, Nilay Vaish <[email protected]> wrote:
I initially thought you mean that we use different offsets in different
parts of the code. But now it seems that you do not like the fact that in
some ISAs FP_Base_DepTag == NumIntRegs and in some it is not true. Looking
at the code for flattening register indices in src/arch/*/isa.hh, it seems
that it is because of peculiarities of arm, sparc and x86 ISAs. I am
guessing we have to live with it.
Your initial understanding was correct, we are using different offsets in
different parts of the code, and that is what is bothering me. For
example, for FP regs, sometimes we use FP_Base_DepTag as an offset and
sometimes we use NumIntRegs.
I think the example you gave shows only one of the sides. It does not show
the code where we added FP_Base_DepTag. It seems like it is being done in
the isa parser.
src/arch/isa_parser.py:613: c_src =
'\n\t_srcRegIdx[_numSrcRegs++] = %s + FP_Base_DepTag;' % \
src/arch/isa_parser.py:618: '\n\t_destRegIdx[_numDestRegs++]
= %s + FP_Base_DepTag;' % \
Now we should try to figure out why we added the FP_Base_DepTag in the
first place. My current guess is that we want to keep the register file
small as possible, but still make it possible that we can add more
registers in future without making much changes or may be without breaking
down checkpoints.
I think the use of these two different offsets is particularly confusing
because, for most ISAs, FP_Base_DepTag does equal NumIntRegs... thus it's
hard to understand the need for two different offsets when they often (but
not always) have the same value. In addition, there is no documentation
explaining why these sometimes (but not usually) have different values.
However, I don't particularly have a problem with them being different as
long as there's a good reason for it.
BTW, do you know what the IntFoldBit in x86 does? I'm beginning to see
that this bit actually plays a significant role in why x86 register
indexing is different from other ISAs. In particular, it appears that the
IntFoldBit means that the "unflattened" integer register space for x86 is
actually larger than the "flattened' register space, which is both
counterintuitive and opposite from all other ISAs.
I don't think your explanation is correct. To me it seems, it is only used
when one wants to write bits <8,15> of a register. I think the only place
where it is used is in microasm.isa. Here is the code:
for reg in ('ah', 'bh', 'ch', 'dh'):
assembler.symbols[reg] = \
regIdx("INTREG_FOLDED(INTREG_%s, IntFoldBit)" % reg.upper())
Of the four registers specified, I think only 'ah' is in use ('ch' might
also be in use, it is hard to read grep's output for ch). And the only
places where 'ah' is used is in multiply and divide instructions and SAHF,
LAHF instructions where we need to perform a merge, since we want to work
with the AH register.
--
Nilay
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