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Ship it! this seems fine... I don't think that using bit 63 should cause any issues (hopefully). - Ali Saidi On Sept. 20, 2013, 1:15 p.m., Andreas Sandberg wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2023/ > ----------------------------------------------------------- > > (Updated Sept. 20, 2013, 1:15 p.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 9884:787229d8611f > --------------------------- > arch: Add support for m5ops using mmapped IPRs > > In order to support m5ops on virtualized CPUs, we need to either > intercept hypercall instructions or provide a memory mapped m5ops > interface. Since KVM does not normally pass the results of hypercalls > to userspace, which makes that method unfeasible. This changeset > introduces support for m5ops using memory mapped mmapped IPRs. This is > implemented by adding a class of "generic" IPRs which are handled by > architecture-independent code. Such IPRs always have bit 63 set and > are handled by handleGenericIprRead() and > handleGenericIprWrite(). Platform specific impementations of > handleIprRead and handleIprWrite should use > GenericISA::isGenericIprAccess to determine if an IPR address should > be handled by the generic code instead of the architecture-specific > code. Platforms that don't need their own IPR support can reuse > GenericISA::handleIprRead() and GenericISA::handleIprWrite(). > > > Diffs > ----- > > src/arch/alpha/mmapped_ipr.hh 372d3611c693 > src/arch/arm/mmapped_ipr.hh 372d3611c693 > src/arch/generic/SConscript 372d3611c693 > src/arch/generic/mmapped_ipr.hh PRE-CREATION > src/arch/generic/mmapped_ipr.cc PRE-CREATION > src/arch/mips/mmapped_ipr.hh 372d3611c693 > src/arch/power/mmapped_ipr.hh 372d3611c693 > src/arch/sparc/mmapped_ipr.hh 372d3611c693 > src/arch/x86/mmapped_ipr.hh 372d3611c693 > > Diff: http://reviews.gem5.org/r/2023/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Sandberg > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
