Hi David, The memory system in gem5 (http://www.gem5.org/Classic_Memory_System) by default uses a MOESI coherency protocol, independent of the ISA.
Andreas On 20/02/2014 16:13, "David Gonzalez Marquez" <[email protected]> wrote: >Hello, > >I would like to know if it is possible to use a cache coherence protocol >on Arm? > >Thanks, >David. >_______________________________________________ >gem5-dev mailing list >[email protected] >http://m5sim.org/mailman/listinfo/gem5-dev > -- IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ARM Limited, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2557590 ARM Holdings plc, Registered office 110 Fulbourn Road, Cambridge CB1 9NJ, Registered in England & Wales, Company No: 2548782 _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
