changeset badc31a41a87 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=badc31a41a87
description:
arm: cleanup ARM ISA definition
diffstat:
src/arch/arm/isa/insts/basic.isa | 34 ----------------------------------
src/arch/arm/isa/insts/insts.isa | 5 +----
src/arch/arm/isa/templates/vfp64.isa | 16 +---------------
3 files changed, 2 insertions(+), 53 deletions(-)
diffs (91 lines):
diff -r a0d94ac7e004 -r badc31a41a87 src/arch/arm/isa/insts/basic.isa
--- a/src/arch/arm/isa/insts/basic.isa Wed Mar 19 19:18:43 2014 -0500
+++ /dev/null Thu Jan 01 00:00:00 1970 +0000
@@ -1,34 +0,0 @@
-// -*- mode:c++ -*-
-
-// Copyright (c) 2007-2008 The Florida State University
-// All rights reserved.
-//
-// Redistribution and use in source and binary forms, with or without
-// modification, are permitted provided that the following conditions are
-// met: redistributions of source code must retain the above copyright
-// notice, this list of conditions and the following disclaimer;
-// redistributions in binary form must reproduce the above copyright
-// notice, this list of conditions and the following disclaimer in the
-// documentation and/or other materials provided with the distribution;
-// neither the name of the copyright holders nor the names of its
-// contributors may be used to endorse or promote products derived from
-// this software without specific prior written permission.
-//
-// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Authors: Stephen Hines
-
-// Declarations for execute() methods.
-def template BasicExecDeclare {{
- Fault execute(%(CPU_exec_context)s *, Trace::InstRecord *) const;
-}};
diff -r a0d94ac7e004 -r badc31a41a87 src/arch/arm/isa/insts/insts.isa
--- a/src/arch/arm/isa/insts/insts.isa Wed Mar 19 19:18:43 2014 -0500
+++ b/src/arch/arm/isa/insts/insts.isa Fri May 09 18:58:46 2014 -0400
@@ -1,6 +1,6 @@
// -*- mode:c++ -*-
-// Copyright (c) 2010-2012 ARM Limited
+// Copyright (c) 2010-2014 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
@@ -40,9 +40,6 @@
//AArch64 instructions
##include "aarch64.isa"
-//Basic forms of various templates
-##include "basic.isa"
-
//Useful bits shared by memory instructions
##include "mem.isa"
diff -r a0d94ac7e004 -r badc31a41a87 src/arch/arm/isa/templates/vfp64.isa
--- a/src/arch/arm/isa/templates/vfp64.isa Wed Mar 19 19:18:43 2014 -0500
+++ b/src/arch/arm/isa/templates/vfp64.isa Fri May 09 18:58:46 2014 -0400
@@ -1,6 +1,6 @@
// -*- mode:c++ -*-
-// Copyright (c) 2012 ARM Limited
+// Copyright (c) 2012, 2014 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
@@ -51,20 +51,6 @@
}
}};
-def template AA64FpRegRegOpConstructor {{
- inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
- IntRegIndex _dest, IntRegIndex _op1,
- VfpMicroMode mode)
- : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
- _dest, _op1, mode)
- {
- %(constructor)s;
- for (int x = 0; x < _numDestRegs; x++) {
- _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
- }
- }
-}};
-
def template AA64FpRegImmOpConstructor {{
inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode)
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