Hello, I found the error source. This assertion goes up when the page table walker inserts an entry into TLB and when it do a second lookup to get that entry, it's not available. The problem is that when walker calls tlb->translate(), the request matches for the following if condition and it's vaddr gets masked; Therefore nothing will match with the masked vaddr in the TLB:
if (m5Reg.submode != SixtyFourBitMode || (flags & (AddrSizeFlagBit << FlagShift))){ vaddr &= mask(32); Does anybody knows the purpose of the above if statement? Any fix to this bug? Thank you,Mohammad On Wednesday, October 29, 2014 10:18 PM, Mohammad Alian <alian.moham...@yahoo.com> wrote: Hello every one, I'm running some map-reduce benchmarks on X86 FS Dual mode. I can run the benchmark with atomic simple cpu, but when I use O3 cpu, after simulating around 3 seconds, I get the following error . Also I should mention that I've hardcoded PCI accesses to be uncacheable to be able to start detailed simulation Re: [gem5-dev] Ethernet device doesn't work with O3 cpu model in X86 ISA. Any help? Thank you,Mohammad switching cpus **** REAL SIMULATION **** warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: Tried to clear PCI interrupt 10 warn: instruction 'fild' unimplemented warn: instruction 'fistp' unimplemented warn: instruction 'fucomi' unimplemented warn: instruction 'fsubrp' unimplemented warn: instruction 'fistp' unimplemented warn: instruction 'fistp' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'clflush' unimplemented warn: instruction 'fcmovne' unimplemented warn: instruction 'fucomip' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: instruction 'prefetch_nta' unimplemented warn: x86 cpuid: unimplemented function 4 gem5.opt: build/X86/arch/x86/pagetable_walker.cc:630: bool X86ISA::Walker::WalkerState::recvPacket(PacketPtr): Assertion `!delayedResponse' failed. _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev