changeset 4e09ae443c96 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=4e09ae443c96 description: arm: Fix decoding of PMXEVTYPER_EL0 and PMCCFILTR_EL0
The aarch64 system register decoder is currently not decoding PMXEVTYPER_EL0 and PMCCFILTR_EL0 correctly. This changeset updates the decoder so that they are decoded using the values in table C5-6 in ARM DDI 0478A.c. diffstat: src/arch/arm/miscregs.cc | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diffs (24 lines): diff -r 6099331da328 -r 4e09ae443c96 src/arch/arm/miscregs.cc --- a/src/arch/arm/miscregs.cc Mon Dec 08 04:49:52 2014 -0500 +++ b/src/arch/arm/miscregs.cc Mon Dec 08 04:49:53 2014 -0500 @@ -3177,7 +3177,7 @@ case 0: return MISCREG_PMCCNTR_EL0; case 1: - return MISCREG_PMCCFILTR_EL0; + return MISCREG_PMXEVTYPER_EL0; case 2: return MISCREG_PMXEVCNTR_EL0; } @@ -3434,6 +3434,11 @@ return MISCREG_PMEVTYPER5_EL0; } break; + case 15: + switch (op2) { + case 7: + return MISCREG_PMCCFILTR_EL0; + } } break; case 4: _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev