changeset 5d119a460f15 in /z/repo/gem5 details: http://repo.gem5.org/gem5?cmd=changeset;node=5d119a460f15 description: x86: Enable three bits in the FamilyModelStepping ECX CPUID bitfield.
These are for the monitor/mwait instructions, SSSE3, and XSAVE. diffstat: src/arch/x86/cpuid.cc | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diffs (12 lines): diff -r e9bc4cde5d8e -r 5d119a460f15 src/arch/x86/cpuid.cc --- a/src/arch/x86/cpuid.cc Tue Jan 06 22:13:56 2015 -0800 +++ b/src/arch/x86/cpuid.cc Tue Jan 06 22:15:00 2015 -0800 @@ -154,7 +154,7 @@ break; case FamilyModelStepping: result = CpuidResult(0x00020f51, 0x00000805, - 0xe7dbfbff, 0x00000001); + 0xe7dbfbff, 0x04000209); break; default: warn("x86 cpuid: unimplemented function %u", funcNum); _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev