I have been debugging why patch rb2557 breaks AMD KVM functionality. I was hoping to get to code that would work on both intel and AMD platforms, but am not there yet.
This patch is to be applied on top of rb2557.patch. There are 2 main issues, neither of which I understand well enough to take much further. The first issue is that the order that the segment descriptors get instantiated in the GDT table seems to matter between AMD and Intel, and they seem to be mutually incompatible. AMD wants: csSys dsSys ds cs Intel wants: ds cs dsSys csSys I am not sure the relative ordering of ds and cs within a class matters, only that AMD wants the Sys ones first, and Intel wants them second. There is also an issue with how 'star' gets defined. I can not make the Intel code work for AMD. Both issues are addressed in this patch. The patch makes the AMD system work, but breaks Intel functionality. I am also not sure how to upload this into review board. Do I create a separate patch from TOT, or can I somehow attach this to rb2557. Hopefully Gabe or Alexandru can weigh in. I am happy to help, but I am at my 'Peter Principal Limit' as far as my understanding goes. I think it would be really ugly to have a machine-type test to version the code... _______________________________________________ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
