changeset fe09d1bc6721 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=fe09d1bc6721
description:
arm: Correctly access the stack pointer in GDB
We curently use INTREG_X31 instead of INTREG_SPX when accessing the
stack pointer in GDB. gem5 normally uses INTREG_SPX to access the
stack pointer, which gets mapped to the stack pointer corresponding
(INTREG_SPn) to the current exception level. This changeset updates
the GDB interface to use SPX instead of X31 (which is always zero)
when transfering CPU state to gdb.
diffstat:
src/arch/arm/remote_gdb.cc | 13 +++++++++----
src/arch/arm/remote_gdb.hh | 1 +
2 files changed, 10 insertions(+), 4 deletions(-)
diffs (47 lines):
diff -r f7d17d8a854c -r fe09d1bc6721 src/arch/arm/remote_gdb.cc
--- a/src/arch/arm/remote_gdb.cc Mon Mar 02 04:00:27 2015 -0500
+++ b/src/arch/arm/remote_gdb.cc Mon Mar 02 04:00:27 2015 -0500
@@ -204,9 +204,10 @@
memset(gdbregs.regs, 0, gdbregs.bytes());
if (inAArch64(context)) { // AArch64
- // x0-x31
- for (int i = 0; i < 32; ++i)
+ // x0-x30
+ for (int i = 0; i < 31; ++i)
gdbregs.regs64[GDB64_X0 + i] = context->readIntReg(INTREG_X0 + i);
+ gdbregs.regs64[GDB64_SPX] = context->readIntReg(INTREG_SPX);
// pc
gdbregs.regs64[GDB64_PC] = context->pcState().pc();
// cpsr
@@ -262,13 +263,17 @@
DPRINTF(GDBAcc, "setregs in remotegdb \n");
if (inAArch64(context)) { // AArch64
- // x0-x31
- for (int i = 0; i < 32; ++i)
+ // x0-x30
+ for (int i = 0; i < 31; ++i)
context->setIntReg(INTREG_X0 + i, gdbregs.regs64[GDB64_X0 + i]);
// pc
context->pcState(gdbregs.regs64[GDB64_PC]);
// cpsr
context->setMiscRegNoEffect(MISCREG_CPSR, gdbregs.regs64[GDB64_CPSR]);
+ // Update the stack pointer. This should be done after
+ // updating CPSR/PSTATE since that might affect how SPX gets
+ // mapped.
+ context->setIntReg(INTREG_SPX, gdbregs.regs64[GDB64_SPX]);
// v0-v31
for (int i = 0; i < 128; i += 4) {
int gdboff = GDB64_V0_32 + i;
diff -r f7d17d8a854c -r fe09d1bc6721 src/arch/arm/remote_gdb.hh
--- a/src/arch/arm/remote_gdb.hh Mon Mar 02 04:00:27 2015 -0500
+++ b/src/arch/arm/remote_gdb.hh Mon Mar 02 04:00:27 2015 -0500
@@ -68,6 +68,7 @@
// AArch64 registers
enum {
GDB64_X0 = 0,
+ GDB64_SPX = 31,
GDB64_PC = 32,
GDB64_CPSR = 33,
GDB64_V0 = 34,
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