changeset 8a7285d6197e in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=8a7285d6197e
description:
arm, configs: Do not forward snoops from I cache
This fix simply tells the I cache to not forward snoops to the fetch
unit (since there is really no reason to do so).
diffstat:
configs/common/O3_ARM_v7a.py | 9 +++++----
1 files changed, 5 insertions(+), 4 deletions(-)
diffs (40 lines):
diff -r ea35886cd847 -r 8a7285d6197e configs/common/O3_ARM_v7a.py
--- a/configs/common/O3_ARM_v7a.py Fri Mar 27 04:56:03 2015 -0400
+++ b/configs/common/O3_ARM_v7a.py Fri Mar 27 04:56:10 2015 -0400
@@ -150,7 +150,8 @@
tgts_per_mshr = 8
size = '32kB'
assoc = 2
- is_top_level = 'true'
+ is_top_level = True
+ forward_snoops = False
# Data Cache
class O3_ARM_v7a_DCache(BaseCache):
@@ -161,7 +162,7 @@
size = '32kB'
assoc = 2
write_buffers = 16
- is_top_level = 'true'
+ is_top_level = True
# TLB Cache
# Use a cache as a L2 TLB
@@ -173,7 +174,7 @@
size = '1kB'
assoc = 8
write_buffers = 16
- is_top_level = 'true'
+ is_top_level = True
# L2 Cache
@@ -185,7 +186,7 @@
size = '1MB'
assoc = 16
write_buffers = 8
- prefetch_on_access = 'true'
+ prefetch_on_access = True
# Simple stride prefetcher
prefetcher = StridePrefetcher(degree=8, latency = 1)
tags = RandomRepl()
_______________________________________________
gem5-dev mailing list
gem5-dev@gem5.org
http://m5sim.org/mailman/listinfo/gem5-dev
