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Ship it! Ship It! - Steve Reinhardt On March 31, 2015, 12:43 a.m., Andreas Hansson wrote: > > ----------------------------------------------------------- > This is an automatically generated e-mail. To reply, visit: > http://reviews.gem5.org/r/2716/ > ----------------------------------------------------------- > > (Updated March 31, 2015, 12:43 a.m.) > > > Review request for Default. > > > Repository: gem5 > > > Description > ------- > > Changeset 10782:71d9c075bef2 > --------------------------- > arch, cpu: Do not forward snoops to table walker > > This patch simplifies the overall CPU by changing the TLB caches such > that they do not forward snoops to the table walker port(s). Note that > only ARM and X86 are affected. > > There is no reason for the ports to snoop as they do not actually take > any action, and from a performance point of view we are better of not > snooping more than we have to. > > Should it at a later point be required to snoop for a particular TLB > design it is easy enough to add it back. > > > Diffs > ----- > > configs/common/Caches.py 8a7285d6197e > configs/common/O3_ARM_v7a.py 8a7285d6197e > src/arch/arm/stage2_mmu.hh 8a7285d6197e > src/arch/x86/pagetable_walker.hh 8a7285d6197e > > Diff: http://reviews.gem5.org/r/2716/diff/ > > > Testing > ------- > > > Thanks, > > Andreas Hansson > > _______________________________________________ gem5-dev mailing list [email protected] http://m5sim.org/mailman/listinfo/gem5-dev
